摘要 |
PURPOSE: To execute a combination or a Boolean logic operation in a single clock cycle by providing a logic circuit for logically combining the bits from a data selection circuit and a rotation circuit in response to a control signal in the single clock cycle and supplying a data output. CONSTITUTION: A rotation circuit 18 rotates the bit of the data word received from a data selection circuit 16 according to the states of the control lines 36 and 38 from a control circuit 10 and this output is supplied to a logic circuit 20 via a line 44. The logic circuit 20 receives the outputs from data selection circuits 16, 14 and 12, further receives control signals from a control circuit 10 via lines 40 and 42, and logically combines the data words supplied from the data selection circuits 16, 14 and 12 according to the signals on the lines 40 and 42. This operation is performed within a single clock cycle. Thus, the combination or a Boolean logic operation can be executed in the single clock cycle. |