| 摘要 |
<p>PURPOSE:To obtain the clock signal of a high frequency at the programmable logic device enabling internal oscillation. CONSTITUTION:A three-state buffer 10 is connected between input terminals I1, and I2. When constituting the oscillation circuit by using a programmable logic device 50, a feedback circuit 60 is connected between the input terminals I1 and I2. On the other hand, a switching element 30 is controlled so that a power supply voltage Vcc can be applied to the enable terminal of the three- state buffer 10. The three-state buffer 10 is operated as an amplifier for oscillation and constitutes the oscillation circuit together with the feedback circuit 60.</p> |
