| 摘要 |
The specification discloses circuitry useful in a digital cryptographic system having a digital prime sequence which controls the generation of randomized key data. The circuitry includes a register for storing the digital prime sequence prior to generation of the randomized key data. A memory is provided which includes address inputs and data outputs and which stores predetermined digital relationships. A stage of the register is connected to an address input of the memory to select one of the stored digital relationships. A source of selectable digital bits is connected to another address input of the memory. The data outputs of the memory are operable to be coupled to the input of the register for generating an enciphered digital prime sequence. A clock clocks the contents of the register through the stages of the register in order to cause the enciphered digital prime sequence to be loaded into the register. The enciphered prime sequence is then utilized to control the generation of randomized data for use in the cryptographic system.
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