| 摘要 |
PURPOSE:To shorten a precharging time without increasing power consumption, and to attain high speed operation by executing precharging after writing simultaneously by means of a precharging circuit and a write circuit. CONSTITUTION:An FF 1, which holds a write signal WE during the precharging period after writing in a write circuit 2, is provided, its output is connected to an output control terminal 10 of the circuit 2, and further a clock signal CLK circuit is connected to a set terminal 11 of the circuit 2. In such a constitution, after the writing of the circuit 2, since the signal CLK becomes an L and a precharge signal becomes an H, and when a word line becomes the L, the memory cell is made nonselective. Further, since the outputs of NAND gates 7 and 8 of the circuit 2 become the H, the potentials of bit lines BL and the inverse of BL are made high through buffer gates 5 and 6 and NMOS TRs 3 and 4. Simultaneously by the precharging circuit, the bit line is precharged. As a result, MOSs 3 and 4 are miniaturized. |
