Time delay circuit which is voltage independent

摘要

A time delay circuit that produces a constant delay and is independent of supply voltage. The time delay circuit has a current mirror circuit, a voltage shift circuit, an inverter and a capacitor. The inverter will trip at a predetermined voltage level. A capacitor is coupled to the current mirror circuit and to the inverter for generating a portion of the delay time. A voltage shift circuit is coupled to the inverter for approximately mirroring a voltage shift in the current mirror circuit thereby allowing the time delay circuit to be voltage independent.