| 摘要 |
PROBLEM TO BE SOLVED: To verify optimal capacitance and arrangement of decoupling capacitors corresponding to power pins or ground pins on a printed board. SOLUTION: For a decoupling capacitor D1 connected with a high speed IC1, the number of power supply pins of the same potential as the high speed IC1 connected with the capacitor and presence of vias between the power supply pins of the same potential and the power supply pins of the capacitor are checked and optimal arrangement and capacity of the decoupling capacitors D1, D2 are calculated using a simple calculation expression. If temporarily designed current arrangement and capacity are different significantly from the calculation results, a message is delivered to designate optimization of the arrangement and capacity of a relevant decoupling capacitor.
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