发明名称 MEMORY PROTECTION SYSTEM
摘要 <p>PURPOSE:To enable to block the delivery of abnormal timing, even with the occurrence of spike noise, by gating and delivering all the various timing signals produced with thememory start signal with the memory cycle signal.</p>
申请公布号 JPS53142832(A) 申请公布日期 1978.12.12
申请号 JP19770057926 申请日期 1977.05.19
申请人 FUJITSU LTD 发明人 YAMADA TOYOSHI
分类号 G06F12/16;G06F1/06;G11C29/00 主分类号 G06F12/16
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