发明名称 Driver buffer circuit using delay inverters
摘要 A driver circuit which comprises a driver stage; an inverter stage formed of an even number of mutually cascade connected inverters and connected to the output side of said driver stage; a first switching element rendered conducting or nonconducting according to a level of an output signal being received from said driver stage; and a second switching element rendered conducting or nonconducting according to a level of an output signal being received from said inverter stage.
申请公布号 US4129792(A) 申请公布日期 1978.12.12
申请号 US19770802136 申请日期 1977.05.31
申请人 TOKYO SHIBAURA ELECTRIC CO LTD 发明人 KAWAGAI K;YOSHIDA S
分类号 G04C3/00;G04C10/00;G04G19/00;H03K5/02;H03K19/00;H03K19/003;(IPC1-7):H03K17/60;H03K17/16;H03K4/48;H03K6/04 主分类号 G04C3/00
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