| 摘要 |
The rise of an intermittently incoming pulse modulated wave is detected to open a gate circuit by the detected output to supply therethrough a clock pulse of a frequency higher than the carrier frequency of the incoming pulse modulated wave to a counter and a pulse decay detector for counting with the former and resetting the latter every carrier cycle of the pulse modulated wave. While the pulse modulated wave continue, the pulse decay detector is repeatedly reset to be prevented from overflowing. Upon interruption of the pulse modulated wave, the pulse decay detector overflows to provide an output after the elapse of predetermined time selected to be longer than one carrier cycle. By the overflow signal, the gate circuit is closed to stop the counting operation of the counter and the numerical value corresponding to the predetermined time is subtracted from the count value of the counter, thereby obtaining the pulse width of the pulse modulated wave. Further, a second counter is provided for counting the carrier cycle of the pulse modulated wave and its carrier frequency is also measured from the count value of the second counter and the pulse width.
|
