发明名称 Encryption/decryption system for calculating effective lower bits of a parameter for Montgomery modular multiplication
摘要 An arithmetic device for Montgomery modular multiplication which quickly calculates a parameter ND, the parameter ND satisfying RxR<SUP>-1</SUP>-NxND=1 for an integer N and a radix R that is coprime to and greater than N, with a large number of effective lower bits. The device comprises an ND generator, a multiplication-accumulation (MAC) operator, and a sum data store. The ND generator produces effective lower bits of ND at a rate of k bits per clock cycle, with reference to lower k bits of a variable S, as well as to lower k bits of an odd positive integer N. The MAC operator multiplies the produced k-bit ND value by N and adds the resulting product to S. The sum data store stores the variable S, which is updated with the output of the MAC operator, with its bits shifted right by k bits, for use by the ND generator in the subsequent clock cycle.
申请公布号 US7403965(B2) 申请公布日期 2008.07.22
申请号 US20040888991 申请日期 2004.07.13
申请人 FUJITSU LIMITED 发明人 MUKAIDA KENJI;TAKENAKA MASAHIKO;TORII NAOYA;MASUI SHOICHI
分类号 G06F7/00;G06F7/72;G09C1/00 主分类号 G06F7/00
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