发明名称 Data processing system with monitoring and regulation of processor free time
摘要 A data processing system using a central processor, in which the free time of the processor is monitored at predetermined intervals. A count is maintained as to the state of the processor at each monitoring, i.e., free or occupied. The chosen interval for monitoring is at least equal to the normal cycle time of the processor between program cycle interrupts. The amount of free time of the computer is determined by this monitoring. The work load or occupancy level of the process is regulated periodically when the free time count is found to be outside of the upper and lower limits which may be revised periodically. This regulation takes the form of limiting or increasing the work input to the system.
申请公布号 US4126895(A) 申请公布日期 1978.11.21
申请号 US19750644743 申请日期 1975.12.29
申请人 INT STANDARD ELECTRIC CORP 发明人 CARRUET V;WEEMAES F
分类号 G06F9/48;G06F9/50;G06F11/34;(IPC1-7):G06F3/00;G06F11/00 主分类号 G06F9/48
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