Sequence controller for computer processing unit - has clock generator and serially connected instruction registers with associated decoders

摘要

A sequence control for the processing unit of a synchronously operating computer housing a clock generator and several instruction and data processing paths is designed to enable simultaneous processing of several instructions. This permits the computer operating speed to be increased and enables large quantities of data to be processed in real time. An instruction path contains a chain of instruction registers each associated with a stage of the path and through which the instructions pass under clock pulse control. Each register is associated with a decoder which identifies the instruction from the operating code to produce control signals which control the associated stages of the data path. The data path input stages contain several independent data inputs.