发明名称 Clock controlled circulating memory circuit - has number of stores and associated devices reduced by use of analyser in timing circuit
摘要 <p>Clock-controlled circulating store circuit has data elements of the same time aspect but in different stores formed into data gps. esp. for time-multiplexed telephone systems, with the data gps. assigned to the simultaneous connections. At least two consecutive data elements of each data gp. are stored in each store (LG). Shift devices (SG) equal in number to the data elements of these data gp. stored in each store and connected to the output of each store. The data elements pass through the shift devices with the same timing as the corresponding store, and an analyser (AW) for timed alteration, erasing and re-circulation is connected to the outputs and inputs of the individual shift devices. All data elements of a gp. are pref. transmitted in parallel between the analysers and their shift devices.</p>
申请公布号 DE1810602(B2) 申请公布日期 1978.11.16
申请号 DE19681810602 申请日期 1968.11.23
申请人 TELEFONBAU UND NORMALZEIT GMBH, 6000 FRANKFURT 发明人 BERGE, EKKEHARD VOM, DR.-ING., 6242 SCHOENBERG
分类号 H04Q11/04;(IPC1-7):11C21/00 主分类号 H04Q11/04
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