| 摘要 |
1532427 Integrated circuits PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd 6 Oct 1975 [9 Oct 1974] 40778/75 Heading H1K [Also in Division H3] An integrated circuit comprises a semiconductor body 94, Fig. 7, having a surface layer 95 of a first conductivity type containing the circuit elements of several logic gate circuits in one surface on which an insulator layer 96 supports a pattern of conductors 86, 90, each gate circuit including inverter transistors 61-85 Fig. 5, whose emitter-base junctions are connected in parallel, the emitters being formed by a common emitter region 92 of one conductivity type and extending below the base zones 64, the gate circuits having a signal input 8, Fig. 2, formed by the connected bases of the inverter transistors whose collectors 93 provide the signal outputs 11 of the gate circuits, the signal inputs 8 being connected to a surface zone of the second conductivity type which serves as the collector of a complementary transistor, the logic circuit being formed by cascading the gate circuits so that a current supplied to the input 8 of a subsequent gate circuit provides the base current for its inverter transistors or the collector current for the inverter transistors of the proceeding gate circuit dependent on the logic input signal, the inverter transistors being distributed between parallel rows which are interconnected by transversely extending conductors 86 which are straight and parallel so that the layout of the circuit can be designed by a computer, and the inverter transistors of different gate circuits and present in adjacent rows are electrically isolated from each other. Transistor isolation.-The inverter transistors may be isolated by a low conductivity semiconductor region 97, or by grooves which may be filled with dielectric and extend below the base regions 64. Base series resistance.-In order to reduce the switching time of the circuits the base series resistance of the inverter transistors is lowered in one embodiment, Figs. 8 and 9 (not shown) by using a comb-shaped base region including a high conductivity ridge portion (98) and low conductivity active base regions (99) projecting from the ridge. Moreover, the doping profile in the inactive part (98) of the base region may be inverted, for example by employing ion implantation, i.e. the doping concentration increases on proceeding from the emitter zone towards the collector zone. In another embodiment, Figs. 10-12 (not shown) highly doped buried regions (122, 123) divide the surface layer into several islands, the highly doped regions forming the common emitter of several inverse transistors whose base (116) and collector (117) are separated from those of another gate circuit by dielectric material (114). Base-emitter potential.-A potential difference of 30-500 mV. may be set up between the emitters of the inverter transistors and the bases of the complementary transistors by connecting an impedance element (137), Fig. 14 (not shown) therebetween, which element may be a resistor or a Schottky diode. This P.D. also helps to reduce the circuits' switching time. Base potential adjustment.-The base potential of the complementary transistors may be adjusted by means of a resistance and diode in the base circuit, Figs. 15-18 (not shown). In this embodiment highly doped surface zones reduce the series emitter resistance and undesirable potential differences in the common emitter zone of the inverter transistors. Semiconductor materials.-The substrate may be silicon which is thermally oxidized to provide the insulating layer, and the dopants may be As, Sb or B. Alternatively, the substrate may be Ge or an A m B v compound. The conductive layer may be Mo, Ti, Pt, Au or a semiconductor material. |
