High speed pulse interpolator

摘要

A D.D.A. (Digital Differential Analyzer) for pulse interpolation having a memory counter with more than two bit positions for counting the number (m) of input instruction pulses in each interpolation cycle, a second counter for receiving the content of the memory counter, and an auxiliary adder for obtaining m multiple of the content of the integrand register in the D.D.A. system. The output of the auxiliary adder instead of the output of the integrand register is applied to an interpolation adder. Thus, the pulse interpolator can operate correctly even when more than two input instruction pulses are generated within a single interpolation cycle.