摘要 |
<p>The analogue time display for an electronic timepiece comprises a gp. of 4 minute display elements, a gp. of 11 5-minute display elements, a gp. of 4 hr. display elements and a gp. of 2 or 4 5-hr. display elements. The display element gps. are associated with an equal number of buffer registers, with each element of each gp. coupled to a respective stage of the respective buffer register, for energising the elements in sequence. An AND gate is coupled to the second or last stage of the third buffer register to the output of the last stage of the fourth buffer register and to the first stage of the first buffer register. The output of the AND gate is coupled to the reset input of third and fourth buffer registers.</p> |