Control method for dynamic translation of buffer address - uses resolution register to divide each address space into common and private portions by use of status fields

摘要

Special controls in a processor prevent synonym entries in a translation look aside buffer (DLAT) for a system which has DLAT entries that can concurrently translate virtual page addresses in multiple address spaces into real main storage page frame addresses. The controls use a synonym resolution register (SRR) which divides each address space in the system into common and private portions. Fields in the SRR indicate which portions are to be common to all address spaces, and which portions are private in each address space. A SRR control circuit selects a particular status field under control of a virtual address requesting main storage access.