| 摘要 |
PURPOSE:To reduce hardware quantity for initial program loading by repeatedly writing read data from a read only memory to a storage device and loading the data from the read only memory to the storage device. CONSTITUTION:In the instruction arithmetic processing unit of a system which executes processing with addressing one instruction, an initial program stored in a read only memory (ROM) 1 is written to one part of a data register (MDR) 3 of a storage device (RAM) 2 for loading the program. Then, for example, a non-processing (NOP) instruction is set to the remained area and after that, the contents of the MDR 3 are repeatedly written to the RAM 2 as the read data from the ROM 1. Then, the data are loaded from the ROM 1 to the RAM 2. Thus, with the small quantity of the hardware such as the addition of a circuit to fix and set the NOP instruction to one part of the MDR 3, the program can be loaded from the one instruction word length of the ROM 1 to the plural instruction words length of the RAM 2.
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