发明名称 SYNCHRONOUS PROCESSOR BETWEEN PROCESSORS
摘要 <p>PURPOSE:To reduce the processor's burden and to increase the flexibility by connecting common register CR with plural processors on the common bus and controlling the system as a securing a synchronization between processors via CR.</p>
申请公布号 JPS53100743(A) 申请公布日期 1978.09.02
申请号 JP19770014567 申请日期 1977.02.15
申请人 KOGYO GIJUTSUIN 发明人 OOMIYA TETSUO
分类号 G06F15/16;G06F5/00;G06F13/38;G06F15/177 主分类号 G06F15/16
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