发明名称 Matching circuit for logic systems - has three MOSFETs in drain-source series between supply poles
摘要 <p>The matching circuit is intended for logic systems. It consists of three MOSFETs in drain/source series between the supply poles. The two MOSFETs (T2, T3) coupled to the output (S) are of n-channel type, whilst the third one (T1) is of P-channel type. If zero is present at the input (E), i.e. the gates of the first and second MOSFETs, the second MOSFET (T2) is off and the first (T1) on. The third MOSFET (T3) only turns on, if the voltage across gate and source is greater than its turn-on voltage.</p>
申请公布号 FR2379945(A1) 申请公布日期 1978.09.01
申请号 FR19770003140 申请日期 1977.02.04
申请人 LABO CENTRAL TELECOMMUNICATIONS 发明人 JOEL SERGE COLARDELLE ET PIERRE GIRARD
分类号 H03K19/0185;(IPC1-7):03K17/56 主分类号 H03K19/0185
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