发明名称 CMOS voltage comparator with internal hysteresis
摘要 A CMOS voltage comparator with internal positive current feedback to achieve a predetermined hysteresis. The voltage level at which the switching occurs is precisely settable. Hysteresis is introduced such that when the set voltage level is exceeded, the output switches quickly and will remain in that state until the input voltage drops by a predetermined hysteresis voltage.
申请公布号 US4110641(A) 申请公布日期 1978.08.29
申请号 US19770810226 申请日期 1977.06.27
申请人 HONEYWELL INC. 发明人 PAYNE, ROBERT L.
分类号 G01R19/00;H03K3/3565;(IPC1-7):H03K5/20;H03F3/18;H03F3/16;H03F3/45 主分类号 G01R19/00
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