发明名称 |
BANDWIDTH LIMIT CIRCUIT FOR STEP VOLTAGE REGULATOR |
摘要 |
<p>BANDWIDTH LIMIT CIRCUIT FOR STEP VOLTAGE REGULATOR A bandwidth limit sensing circuit for a step voltage regulator adapted to maintain its output voltage within upper and lower bandwidth limits derives a lower limit reference potential at the wiper of a bandwidth setting potentiometer connected in a circuit across a reference voltage source and an upper limit reference potential at the output of a unity gain operational amplifier inverter having inputs coupled to the potentiometer wiper and to the reference voltage source. First and second voltage comparators respectively compare the upper and lower limit reference potentials to a sample voltage proportional to the regulator output voltage.</p> |
申请公布号 |
CA1037117(A) |
申请公布日期 |
1978.08.22 |
申请号 |
CA19750230118 |
申请日期 |
1975.06.25 |
申请人 |
ALLIS-CHALMERS CORPORATION |
发明人 |
GILMORE, THOMAS P. |
分类号 |
G05F1/153;(IPC1-7):05F1/20 |
主分类号 |
G05F1/153 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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