发明名称 PHASE LOCKED LOOP CIRCUIT
摘要 S0894 (S77P22) PHASE LOCKED LOOP CIRCUIT In a phase locked loop circuit which includes a variable frequency oscillator, a reference signal oscillator, a phase comparator for detecting the phase difference between the output signals of the reference signal oscillator and the variable frequency oscillator, respectively, and a low pass filter supplied with the output of the comparator so as to provide a corresponding DC voltage for controlling the variable frequency oscillator, and in which the variable frequency oscillator is manually changed, as by a variable capacitor, so that the frequency thereof is an integral multiple of the frequency of the reference signal oscillator; a control signal generating circuit is provided to detect the DC voltage from the low pass filter and to produce a control signal when the DC voltage is outside a predetermined voltage range, with the control signal being applied to the variable frequency oscillator so as to vary the frequency thereof outside of the lock range of the phase locked loop toward the capture range thereof until the next succeeding phase locking state is obtained. In one embodiment of the invention, the control signal is used also to control an audio muting circuit, for example, in the transmitting path of a radio receiver in which the phase locked loop circuit is used as a local oscillator.
申请公布号 AU2219477(A) 申请公布日期 1978.08.17
申请号 AU19770022194 申请日期 1977.02.11
申请人 SONY CORP. 发明人 NAME NOT GIVEN
分类号 H03G3/34;H03L7/12;H03L7/20 主分类号 H03G3/34
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