| 摘要 |
A conventional stepping motor has an optical disk connected to its rotor. Optically generated pulses from the disk are used to generate a signal indicating the speed of the rotor. A code converter converts the speed signals into a binary-encoded power-required signal for feedback to control the power delivered to the coils of the stepping motor so as to maintain a constant stepping speed. The encoded power-required signal is delivered to a binary comparator which delivers an output pulse of one binary sense or the other. A clock driving a counter generates a binary count having the same number of binary levels as the encoded power-required signal fed to the comparator. The output of the counter is also fed to the comparator. The comparator delivers an output of one binary sense when the clock count is less than the binary-encoded power-required signal and an output of the other binary sense when the counter output is greater than the power-required signal. Therefore, the output of the comparator is essentially a square wave having a frequency equal to the frequency of the clock delivered to the counter divided by the count modulus of the counter. The output of the comparator is used to gate the drive signals of the stepping motor at a rate substantially higher than the normal stepping rate of the stepping motor and higher than the normal maximum audible frequency. Therefore, the stepping motor drive pulses are effectively chopped by the output of the comparator. The duty cycle of the chopped signal controls the ON versus OFF ratio and thus the power supplied to the stepping motor coils.
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