| 发明名称 |
HALVLEDARANORDNING INNEFATTANDE ETT HALVLEDARMINNESELEMENT |
| 摘要 |
The invention relates to a JFET memory in which the information at the gate electrodes of the JFET's is stored and read-out non-destructively. Each JFET has an IGFET structure situated entirely within the JFET and the gate of which is coupled to the source or drain of the JFET. The information can be refreshed periodically at cell level (that is without external amplifiers) by means of said IGFET. |
| 申请公布号 |
SE7801169(A) |
申请公布日期 |
1978.08.05 |
| 申请号 |
SE19780001169 |
申请日期 |
1978.02.01 |
| 申请人 |
NV * PHILIPS' GLOEILAMPENFABRIEKEN |
发明人 |
M G * COLLET;R H W * SALTERS;J J M * KOOMEN |
| 分类号 |
G11C11/35;G11C11/404;H01L21/8242;H01L27/088;H01L27/108;H01L27/12;H01L29/78;(IPC1-7):G11C11/40 |
主分类号 |
G11C11/35 |
| 代理机构 |
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代理人 |
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