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发明名称
MEMORY CELL
摘要
<p>PURPOSE:To secure a high-speed operation as well as the electrical specifications suitable to the ECL (emitter combination) circuit, by flowing the current flowing to the memory cell to either one of more than two current paths.</p>
申请公布号
JPS5388540(A)
申请公布日期
1978.08.04
申请号
JP19770002880
申请日期
1977.01.17
申请人
HITACHI LTD
发明人
HARADA YUTAKA;MASAKI AKIRA;ASAKURA HISASHI
分类号
G11C17/06;G11C17/08
主分类号
G11C17/06
代理机构
代理人
主权项
地址
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