Multi-access memory module for data processing systems

摘要

Memory apparatus for use in a data processing system and which includes in its entirety a number of multi-access modules each formed of a plurality of data bit cells. Each module is accessed through multiple independent channels and each channel is capable of servicing a different request during the same memory cycle. Structurally, each independent channel is coupled by a drive line to a data bit storage cell and each drive line is energizable to close a switch mechanism for connecting a read-write bit line circuit to the cell. Individual cells have their own independent bit line circuits and switch mechanisms. Thus, plural requests for a read-out of a single cell can be serviced simultaneously. Special circuitry is suggested for resolving conflicts arising in situations involving simultaneous read-write or write requests addressed to a single cell.