发明名称 STAGE GENERATIVE CIRCUIT
摘要 <p>PURPOSE:To check the dynamic function of the logic circuit of a synchronous program control unit easily, by inserting any number of dummy stages between instructions and by changing the time of any stage which constitutes an instruction.</p>
申请公布号 JPS5387135(A) 申请公布日期 1978.08.01
申请号 JP19770001222 申请日期 1977.01.11
申请人 HITACHI LTD 发明人 TSUJITA YOSHINORI;TAKAKURA KENJI
分类号 G06F1/04;G06F11/00 主分类号 G06F1/04
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