摘要 |
The reception and decoder circuit for a slave clock has a seconds pulse generator supplying 60 seconds pulses each minute, which are synchronised with the received signal. The minutes signal supplied by the reception circuit is used to reset the counter circuit of the internal seconds pulse generator used for frequency division. Pref., if the received signal fails, the slave clock is automatically switched to autonomous operation. The quartz oscillator used for the seconds pulse generator pref. also provides the IF signal for the heterodyne reception circuit. |