发明名称 MOS TYPE SEMICONDUCTOR DEVICE
摘要 PURPOSE:To increase the density of a MOS type semiconductor device without lowering element isolation capacity and breakdown strength by providing a recessed section for ensuring a specified distance from an edge to a section of the element isolation region of a gate electrode wiring pattern. CONSTITUTION:A recessed section 15 is shaped onto an element isolation region in the pattern of a gate electrode 111, thus ensuring a distance A from the edge of a p<+> type layer 13 for preventing inversion to the gate electrode 111 at a predetermined value. A distance B from an n<+> type 9 to a p<+> type layer 13 is also secured at a fixed value, thus arranging a bit-line contact section 14 to a section nearer to the gate electrode than conventional devices. Consequently, the density of an E<2>PROM array can be made higher than conventional devices without lowering element isolation capacity and breakdown strength. The device is applied to a NAND cell type E<2>PROM at that time, but the device can be applied to all MOS type integrated circuits having structure in which other type E<2>PROM, EPROM and MOS transistors are disposed adjacently while the gate electrode is used in common similarly.
申请公布号 JPH02222174(A) 申请公布日期 1990.09.04
申请号 JP19890042403 申请日期 1989.02.22
申请人 TOSHIBA CORP 发明人 ARITOME SEIICHI;SHIRATA RIICHIRO
分类号 H01L21/8247;H01L21/76;H01L27/115;H01L29/06;H01L29/78;H01L29/788;H01L29/792 主分类号 H01L21/8247
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