REKENINRICHTING MET EEN KABELSTRUKTUUR VOOR HET IN EEN BEPAALDE RICHTING OVERDRAGEN VAN INFOR- MATIE, INSTRUKTIES EN ANDERE INFORMATIE TUSSEN EEN CENTRALE VERWERKINGSEENHEID EN EEN AANTAL GEHEUGENINRICHTINGEN EN INVOER/UITVOERINRICH- TINGEN.

摘要

A microprocessor architecture for a microprocessor on a single semiconducting chip has an improved bus system and clock control for internal operation management. These enable reductions in the number of drive circuits, the power consumption, and the number of connections per chip. A unidirectional bus connects the arithmetic and logic unit to an output buffer via a full register. An address register connected to the bus controls address modification or branching and connection operations. Also connected to the bus are registers for accumulation, accumulator expansion, errors, interrupts, counter, and current operations. An instruction decoder instigates data or instruction signal storage. A multiplex access channel and priority encoder manage cycle associations and interrupt requests. Controllers select input and output channels.