发明名称 ADRESSERINGSKRETS AVSEDD FOR EN DATOR, VARS MINNESREGISTER ER FORDELADE PA OLIKA OMRADEN
摘要 A means for automatically changing from a first to a second processor state register (PSR) when the relative address represented by the base value contained in the first of the PSR's does not fall within first predetermined limits. Logic means respond to such limits test failure to automatically switch active PSR's and recompute the absolute address using the base value contained in the other second PSR, followed by another limits test using second predetermined limits. When both limits tests fail a guard mode bit is tested which, if clear, will permit execution of the instruction outside the predetermined limits. When a jump instruction is involved, the switch of PSR's is made permanent until the occurrence of the next jump instruction requiring an automatic switching of PSR's.
申请公布号 SE402168(B) 申请公布日期 1978.06.19
申请号 SE19730015062 申请日期 1973.11.06
申请人 * SPERRY RAND CORPORATION 发明人 G D * BOSS;D G * MCBEATH;V H * CRANE;M D * THOMPSON
分类号 G06F9/34;G06F9/46;G06F9/48;G06F12/02;G06F12/06;(IPC1-7):06F9/20 主分类号 G06F9/34
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