发明名称 |
Digital system for teaching machine classifications - has sets of logic units including flip=flops, multipliers, NAND=gates and AND=gates to form products of input valves and weighting factors |
摘要 |
<p>The digital system using linear elements for classification of values obtained by teaching machines operates on both incremental and extreme values. It uses a multiplier and an adjuster with six adders and a number of flip-flops. The outputs are connected with a logic unit containing AND gates and OR gates. Circuit components include a multiplier to inctruduce weighting factors, and a typical unit involves NAND gates (31, 33), AND gates (32, 34) and an adder (35). The products formed are carried to a common terminal block (P2-P6). A futher stage incorporates an averging unit to produce mean values from the product totals.</p> |
申请公布号 |
DE2753606(A1) |
申请公布日期 |
1978.06.15 |
申请号 |
DE19772753606 |
申请日期 |
1977.12.01 |
申请人 |
VEB KOMBINAT ZENTRONIK |
发明人 |
FIMMEL,BURKHART,DIPL.-PHYS. |
分类号 |
G06K9/66;(IPC1-7):06F7/38;06F15/18 |
主分类号 |
G06K9/66 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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