发明名称 INPUT*OUTPUT BUFFER CIRCUIT
摘要 PURPOSE:To avoid the electric short between the input/output buffers resulting from a timing discrepancy between the integrated circuits by putting the input/ output buffer circuit under a high imedance at least once at the former half part of the cycle time.
申请公布号 JPS5362949(A) 申请公布日期 1978.06.05
申请号 JP19760137373 申请日期 1976.11.17
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 KANUMA AKIYOSHI
分类号 H03K19/0175;H03K19/003 主分类号 H03K19/0175
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