发明名称 Test pulse shaping circuit - has common collector transistor with bridging resistor reducing rise time of pulses
摘要 <p>A digital circuit, suitable for connection between a test circuit and a cable connected to a circuit to be tested, reduces the rise time of the output pulse. It includes a transistor (T) connected in common collector configuration. Pulses for transmission by way of cable (K) are presented at a first input (E1). A control signal indicating whether the test circuit is connected to an input or output of the circuit under test, is fed to a second input (E2). The supply voltage is connected to the inputs via a resistor (R3) and two diodes (D1, D2). Under condition (E2=1, E1=1 the transistor (T) is conducting for the duration of the leading edge of positive pulses, bringing the pull-up resistor (R1), thereby increasing the slope of the pulses.</p>
申请公布号 DE2653392(A1) 申请公布日期 1978.06.01
申请号 DE19762653392 申请日期 1976.11.24
申请人 SIEMENS AG 发明人 AISTLEITNER,OLAF
分类号 G01R31/28;(IPC1-7):01R31/28 主分类号 G01R31/28
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