发明名称 Interval timer for use in an input/output system
摘要 An input/output system includes a plurality of modules and a system interface unit having a plurality of ports, each of which connects to a different one of the modules. The plurality of modules includes at least one processor and one memory module. The system interface unit includes a timer unit and a priority network for processing processor interrupt requests on a priority basis. The priority network connects to a register for storing coded priority level signals to be assigned to the different types of interrupt requests. The register is conditioned to store a low priority level for timer interrupts. The timer unit includes a preset register, an interval counter and a rollover counter. At the completion of each time interval, the interval counter is loaded automatically from the preset register and counting is continued. Simultaneously, the interval counter conditions the rollover counter to store a count registering the total number of completed intervals counted. The processor responds to a timer interrupt request by a special command which can only selectively clear the rollover counter to ZEROS when the interval counter is not in the process of completing another interval.
申请公布号 US4090239(A) 申请公布日期 1978.05.16
申请号 US19760755907 申请日期 1976.12.30
申请人 HONEYWELL INFORMATION SYSTEMS INC. 发明人 TWIBELL, JEROME J.;GRISWOLD, VICTOR MICHAEL;CALLE, JAIME
分类号 H01H43/00;G04F3/00;G06F13/26;(IPC1-7):G06F9/18 主分类号 H01H43/00
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