| 发明名称 |
DIAGNOSIS LOGICAL OPERATION CIRCUIT |
| 摘要 |
PURPOSE:To enable a diagnosis even under operation of polynominal arithmetic circuit by adding 1st and 2nd data storage circuits plus a circuit to perform an exclusive logical sum for the output of these storage circuits to an aoptional polynominal arithmetic circuit. |
| 申请公布号 |
JPS5349922(A) |
申请公布日期 |
1978.05.06 |
| 申请号 |
JP19760125168 |
申请日期 |
1976.10.18 |
| 申请人 |
NIPPON ELECTRIC CO |
发明人 |
KINOSHITA HARUNOBU;MIZUOCHI KAZUYUKI;SUZUKI TAKAO |
| 分类号 |
G06F12/16;G06F11/00;G06F11/08;G06F11/10;G06F11/22;G11C29/00;H03M13/00 |
主分类号 |
G06F12/16 |
| 代理机构 |
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代理人 |
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