| 摘要 |
<p>An analogue and digital circuit network for time integrating input signals over a long period overcomes the problem of amplifier drift by resetting the integrator and incrementing a counter when the integrator output attains a specified threshold level. The circuit performs the same task electronically as certain mechanical graph plotters, planimeters and the like. An amplifier input stage drives the integrator stage using a feedback capacitance. The signal from this, representing a short term time integral of the input signal is fed to a comparator stage which fires a pulse generator when a specified threshold is exceeded. This increments an output digital counter with display and also discharges the integrator with a FET.</p> |
