| 发明名称 |
ADDRESS SET SYSTEM OF INTERLEAVE DRIVING MEMORY CIRCUIT |
| 摘要 |
PURPOSE:The time when the address in a memory bank can be varied is lengthened by lagging operation of the memory bank, so that an effective operation speed due to interleave can be increased. |
| 申请公布号 |
JPS5345937(A) |
申请公布日期 |
1978.04.25 |
| 申请号 |
JP19760120319 |
申请日期 |
1976.10.08 |
| 申请人 |
HITACHI LTD;NIPPON TELEGRAPH & TELEPHONE |
发明人 |
WATANABE MITSUNARI;HOSHINO HATSUO;KAWAKUBO HIDEJI |
| 分类号 |
G11C19/00;G06F12/06;G11C8/18 |
主分类号 |
G11C19/00 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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