发明名称 Memory system with a sense circuit
摘要 In a memory system comprised of a memory array having a plurality of first data lines each of which has a plurality of memory cells connected thereto and a sense circuit for discriminating the information in the memory cells, the sense circuit includes a pair of second data lines, a pair of switching elements for selectively connecting two first data lines on the memory array with the pair of second data lines in response to applied address signals, and a sense amplifier comprising a flip-flop circuit having two input nodes connected to said pair of second data lines.
申请公布号 US4085457(A) 申请公布日期 1978.04.18
申请号 US19760672154 申请日期 1976.03.31
申请人 HITACHI, LTD. 发明人 ITOH, KIYOO
分类号 G11C11/409;G11C5/02;G11C11/404;G11C11/4093;(IPC1-7):G11C7/06 主分类号 G11C11/409
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