| 发明名称 |
Integrated circuit device |
| 摘要 |
A semiconductor integrated circuit 3 transistor/bit cell includes two MOS transistors having superposed and insulated gate electrodes overlying the substrate at the portion between the diffused regions, so that the memory can be fabricated in a reduced area.
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| 申请公布号 |
US4084108(A) |
申请公布日期 |
1978.04.11 |
| 申请号 |
US19750628463 |
申请日期 |
1975.11.04 |
| 申请人 |
NIPPON ELECTRIC CO., LTD. |
发明人 |
FUJIMOTO, SHOJI |
| 分类号 |
G11C11/401;G11C11/405;H01L21/8242;H01L23/522;H01L27/108;(IPC1-7):H01L29/78;H01L29/60;G11C11/24;G11C11/40 |
主分类号 |
G11C11/401 |
| 代理机构 |
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代理人 |
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