| 摘要 |
<p>1442004 Aritiskid braking systems GENERAL MOTORS CORP 12 Sept 1974 [28 Nov 1973] 39808/74 Heading F2F An antiskid vehicle braking system comprises means for producing a signal representing wheel speed, a circuit for producing an on/off signal which activates brake release means, the circuit including first and second channels each independently sensing incipient wheel lock, the first channel being more sensitive to incipient wheel lock than the second channel in a first range of road coefficient and wheel load conditions and the second channel being more sensitive than the first in a second range of such conditions complementary to the first range, the first channel including a deceleration sensing means responsive to the speed signal to produce the control signal when the rate of change of wheel speed exceeds a predetermined deceleration threshold indicative of incipient wheel lock and the second channel including means responsive to the speed signal for deriving a velocity error signal representing the difference between wheel speed and an estimated vehicle speed, and means for producing the control signal when the said error signal exceeds one threshold and terminating the control signal when the error signal drops below another threshold. As shown, tachogenerators 12, 12<SP>1</SP> feed pulsed signals to frequency to voltage converters 16, 16<SP>1</SP> and a speed selector 20 selects from the analogue signals that representing the lower wheel speed. A first control channel comprises a deceleration switch circuit 26 which provides a brake release control signal on a line 28 whenever the selected wheel is decelerating faster than a predetermined threshold such as 1 or 2 g indicative of incipient wheel lock. A solenoid driver 30 amplifies the control signal to energize a solenoid 32. A second channel includes a differentiator 34 having its output connected to a release integrator 36 and release comparator 40, an acceleration follower circuit 42 receiving the speed signal and a delayed g level circuit 44 also being connected to the differentiator, the algebraic sum obtained at a junction 38 providing the input of integrator 36. The circuit also includes means for detecting malfunction and comprises a self-check logic circuit 52 which produces a continuous reset signal on line 56 until signals on lines 45 or 54 change state indicating that a brake release signal has been given. A self-check accelerometer 58 receives the speed signals; differentiates it and monitors the wheel acceleration and produces an output signal whenever wheel acceleration exceeds À5 g or deceleration exceeds 1À5 g, the signal being a reset signal on line 56. A timer 60 has line 56 as its input and when there is no signal on line 56 produces an output voltage increasing with time which triggers a synchronous re-apply circuit 62 after À3 seconds to re-apply the brakes so that if the persistence of synchronous speed was due to an erroneous vehicle deceleration estimate the controller will correct itself but if due to malfunction such as solenoid failure a comparator and latch circuit 64 produces an output after À5 seconds to energize a warning lamp 68 and ground line 28 to disable the controller.</p> |
