| 摘要 |
An insulated gate FET comprises a semiconductor substrate, source and drain regions formed in the surface of the semiconductor substrate in a manner spaced at a prescribed interval from each other, and a gate electrode provided on a surface portion of the substrate between the source and drain regions through an insulation layer. Depletion layers formed by the action of a buit-in-field are spread, respectively, into said semiconductor substrate from the source and drain regions, and these two depletion layers contact each other.
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