发明名称 General purpose divide by two logic circuit - has four similar gates and logic inverter composed of transistor stages
摘要 <p>The divide-by-two logic circuit is for general computer and calculator use. The circuit is simplified allowing its inclusion in integrated circuits each of the logic gates used being of the same type, one orm of the circuit having four such gates and a logic inverter. The basic circuit has five basic loops with four logic gates using the same algebraic. Boole function having a given propagation delay and a logic inverter in the input circuit having a delay twice this value. The gates are connected to provide two retrocoupled loops providing an output which is direct and/or complementary.</p>
申请公布号 FR2362534(A1) 申请公布日期 1978.03.17
申请号 FR19760009528 申请日期 1976.04.01
申请人 LABO ELECTRONIQUE PHYSIQUE APPLI 发明人 DOMINIQUE BOCCON-GIBOD
分类号 H03K3/037;H03K19/017;(IPC1-7):03K23/00;03K3/286 主分类号 H03K3/037
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