发明名称 COMPLEMENTARY TYPE INSULATED GATE EFFECT TRANSISTOR
摘要 PURPOSE:To obtain a C-MOS of a high speed and a high scale of integration by encircling the perimeters and bottom surfaces of the source, drain of the N, P channel transistors formign the C-MOS with the regions of an opposite conductivity type from the source, drain and of an impurity concentration higher than that of substrate.
申请公布号 JPS5323577(A) 申请公布日期 1978.03.04
申请号 JP19760097707 申请日期 1976.08.18
申请人 HITACHI LTD 发明人 SAKAI YOSHIO;MASUHARA TOSHIAKI
分类号 H01L21/8238;H01L21/8242;H01L27/08;H01L27/092;H01L27/10;H01L27/108;H01L29/78 主分类号 H01L21/8238
代理机构 代理人
主权项
地址