发明名称 CLOCK CONTROL SYSTEM OF MEMORY DEVICE
摘要 PURPOSE:At the memory device which is constituted by using a charge transfer device, a clock frequency is changed over depending upon access frequency to utilize the performance of the device at its maximum, thereby realizing both high processing performance and low power consumption.
申请公布号 JPS5323239(A) 申请公布日期 1978.03.03
申请号 JP19760097605 申请日期 1976.08.16
申请人 HITACHI LTD 发明人 HAYASHI SHIGEO
分类号 G11C19/00;G11C11/4076;G11C27/04;H03H11/26 主分类号 G11C19/00
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