发明名称 FM RECEIVER
摘要 PURPOSE:To contrive the improvement of the S/N by adopting the 1st and 2nd variable impedance circuits. CONSTITUTION:When the level of an FM intermediate frequency input signal VIFIN is reduced remarkably, a collector current of a transistor (TR) Q24 is increased and the emitter input resistance of TRs Q20-Q23 is decreased. Thus, a 1st and a 2nd variable impedance circuits 61, 62 are adopted so as to drive out a high frequency noise component in an output signal at terminals Nos. 14, 15 to a ground through capacitors C24, C25 and the 1st and 2nd variable impedance circuits 61, 62 having a low impedance in the even of the remarkable decrease in the level of the FM intermediate frequency input signal VIFIN, then the S/N is improved further.
申请公布号 JPS63211828(A) 申请公布日期 1988.09.02
申请号 JP19880028664 申请日期 1988.02.12
申请人 HITACHI LTD 发明人 IENAKA MASANORI
分类号 H04H40/45;H04H40/72 主分类号 H04H40/45
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