| 摘要 |
<p>A microinstruction sequencer capable of directing an arithmetic-logic unit means to conduct conditional operations is disclosed and generally comprises a ROM and a selecting means. The ROM has a memory of m bits wide and n words long, wherein for an m bit wide word in the ROM which defines a conditional operation, a first plurality of bits of the m bits are allocated to a first set of bits for instructing the arithmetic-logic unit as to the function it is to perform, a second plurality of bits of the m bits are allocated to a second set of bits for instructing the arithmetic-logic unit as to the function it is to perform, and a third plurality of bits of the m bits are allocated to a set of control bits. The selecting means selects one set of bits from at least the first and second sets of bits, and includes control means for receiving the control bits and controlling the selection by the selection means in response thereto. By selecting between the first and second sets of bits, the microinstruction sequencer conditionally instructs the arithmetic-logic unit.</p> |
