发明名称 Digital computer monitoring and restart circuit
摘要 A digital computer monitoring and restart circuit monitors the presence of periodic output signals from the digital computer by a missing pulse detector. When the detector senses a missing output signal from the computer, it indicates this detection operation by an output signal representation of the fact that the computer is not operating. In response to this output signal a restart pulse is generated by a restart pulse generator and is applied to the computer to restart the computer and to reset the monitoring circuit. Concurrently, a 5-second timer circuit is started. While the timer circuit is operating over its 5-second interval, if the monitoring circuit produces another output signal indicating that the computer is not operating, the 5-second timer is stopped and another restart operation is not attempted. If the 5-second timer is allowed to run to the end of the 5-second interval without the detection of a computer outage, the monitoring and restart circuit is reset by the 5-second timer to an initial state indicative of the continuing operation of the computer while awaiting a subsequent computer outage.
申请公布号 US4072852(A) 申请公布日期 1978.02.07
申请号 US19760716709 申请日期 1976.08.23
申请人 HONEYWELL INC. 发明人 HOGAN, JAMES A.;SKLAROFF, MORTON
分类号 G06F11/00;G06F11/14;(IPC1-7):G06F11/04 主分类号 G06F11/00
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