发明名称 SIMPLIFIED ARITHMETIC LOGIC SYSTEM INCLUDING INFORMATION BIT POSITION SCALER
摘要 <p>The arithmetic logic unit and position scaler receives information from a data bus, provides arithmetic functions such as add, logical AND and exclusive OR, and shift manipulations to the information received from the data bus, and then directs the resultant information to the same data bus. The information bit position scaler or shifter includes logic for shifting bit information in a right, left or circular mode. The position scaler provides layers of shifts with the last shift of one being performed in a multiplexer unit which is common to the arithmetic logic unit.</p>
申请公布号 CA1026004(A) 申请公布日期 1978.02.07
申请号 CA19740191664 申请日期 1974.02.04
申请人 HONEYWELL INFORMATION SYSTEMS INC. 发明人 STAFFORD, JOHN P.
分类号 G06F5/01;G06F7/00;G06F7/50;G06F7/575 主分类号 G06F5/01
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